Nowadays, so-called power converters are used for converting electric energy. The same allow the connection of energy sources with given voltages, currents and frequencies to energy sinks or loads. Here, the converter converts electric energy of one form, such as alternating current (AC), direct current (DC) or a mixed form thereof into a different form, in a single or multiple stages. Generally, the converter consists of semiconductor-based switches connected in the necessitated topology, for example as H bridge inverter or as 3-phase 6-pulse inverter. The most frequently used electronic switches are insulated gate bipolar transistors (IGBT) or metal oxide semiconductor field effect transistors (MOSFET). These semiconductor switches are controlled via so-called gate drivers and hence represent the interface between the power switch and the small-signal main control of the converter.
The requirements for such a gate driving unit (GDU) are the following: small installation space (usually determined by the form factor of the power switch package), sufficient driving power (when activating or deactivating the switches, extreme pulse energies are necessitated for reliable switching), ensuring small switching losses of the power switches (switching losses are frequently the main focus when optimizing converters), ensuring small conduction losses of the power switches, little effort for driver adaptations when using new or different power switches (plug and play), flexible scalable GDU for different applications (reusability, avoiding design variations), short death or delay time in the signal path of the converter control, high configurable degree of protection and/or interference radiation conforming to standards in any operating point if possible.
FIG. 10 illustrates the standard topology of a GDU with its functional blocks. Switching on a semiconductor-based switch 12 is performed by means of a voltage source VOn and a transmission factor k1. Thereby, a gate current IGon is induced. Switching off is performed with a voltage sink Voff and the transmission factor k2. Thereby, the gate current IGoff is induced. In the error case “overcurrent”, an alternative switch-off path is used via the transmission factor k2 by which a gate current IGoff,err is induced. This enables small installation space, ensuring low conduction losses in the power switch 12, inexpensive production and a basic degree of protection.
It is a disadvantage of such an implementation that the driving power is not optimal for each switching time/operating time, that the switching losses can only be optimized for one operating point (voltage, load current, temperature). Further, a tradeoff has to be found between short death/delay time and di/dt behavior, du/dt behavior as well as power losses in the tail phase. Further, it is disadvantageous that the switching sequence does not compensate any component leakages, that high effort is necessitated when using new or different power switches for changing the topology or for adapting the switching behavior by component changes, that no flexible adaptation or scalability is given as well as no high or no configurable degree of protection is possible. Interference radiation conforming to standard heavily influences the losses and is not suitable for a partial load at the switch 12.
The topology in FIG. 10 is also described as single-stage resistively controlled or as GDU resistive with SoftTurnOff.
FIG. 11 shows a basic structure of a single-stage/multi-stage analog-controlled GDU with active change of the gate dropping resistor. Here, two and up to, for example, a maximum of eight switching stages are useful for switching on as well as switching off the semiconductor-based switch 12. Mostly, two or three stages are known. Switching on is performed with one voltage source VOn each and the transmission factors k1,1 . . . k,n.
Thereby, the gate current IGon,x is induced in different paths with x=1, . . . , n. Controlling the sequence can be performed directly by the superordinate control instance. Alternatively, the control can be performed with a configured time control on the GDU.
Switching off is performed with a voltage sink VOff and the transmission factors k2,1 . . . k2,n. Thereby, the gate current IGoff,x is induced with x=1, . . . , n. The sequence can be performed directly by the superordinate control instance. Alternatively, the sequence can be performed with a configured time control on the GDU. In the error case “overcurrent”, an alternative switch-off path via the transmission factor k3 is used. This offers the advantage of improved adaptation of the driving power for each switching time, improved optimization between short death/delay time, di/dt behavior, du/dt behavior and power losses in the tail phase, reduced impact on the power losses with interference radiation conforming to standards, ensuring small conduction losses in the power switch as well as a basic degree of protection. In other words, FIG. 11 shows a GDU having variable gate resistors.
Disadvantages of such an embodiment are an increased need for components, a more complex sequence control as well as additional (galvanically isolated) control channels. This results in increased costs. Further, it is disadvantageous that switching losses can be optimized only for one operating point (voltage, load current, temperature), that the switching sequence does not compensate any component leakages, that high effort results when using new/different power switches, that no flexible adaptation/scalability of the circuit is possible, that no high or even configurable degree of protection can be obtained. Due to lack of feedback, switching sequence drift is possible.
FIG. 12 shows a basic structure of a GDU having two voltage levels. Generally, this can be referred to as GDU having multiple voltage levels. Two voltage levels each are documented for switching on and switching off the semiconductor-based switch 12. Switching on is performed starting with a voltage source VOn2 and reduced gate current IGon. Then, switching to voltage source VOn1 and maximum gate current IGon follows. Controlling the sequence can be performed directly by the superordinate control instance. Alternatively, the sequence can be performed with a configured time control on the GDU. Switching off takes place starting with a voltage sink VOff2 and reduced gate current IGoff. Then, switching to the voltage sink VOff1 and maximum gate current IGoff follows. The sequence can be performed directly by the superordinate control instance. Alternatively, the sequence can be performed with a configured time control on the GDU. In the error case “overcurrent”, an alternative switch-off path via the transmission factor k3 is used.
This provides the advantage of improved adaptation of the driving power for each switching time, improved optimization between short death/delay time, di/dt behavior, du/dt behavior and power losses in the tail phase. Further, interference radiation conforming to standards can be obtained, which influences the switching losses to a lesser degree. Lower conduction losses in the power switch can be ensured and a basic degree of protection can be obtained.
It is a disadvantage that increased need for components, more complex sequence control as well as additional (galvanically isolated) control channels result which result in increased costs. Switching losses can only be optimized for one operating point (voltage, load current, temperature). Further, the switching sequence does not compensate any component leakages. A high effort results when using new/different power switches, no flexible adaptation/scalability of the system is possible, and no high or even configurable degree of protection can be obtained. Switching sequence drift due to lack of feedback can occur. Implementing a second voltage level causes additional losses, depending on the realization.
FIG. 13 shows the basic structure of a single-stage/multi-stage analog-controlled GDU. Different documented extension levels exist for this principle. However, all of them are based on returning the collector potential/drain potential for detecting the duc/dt and dud/dt, respectively (derivative drain voltage over time) as well the voltage of the module-internal leakage inductance between auxiliary emitter/source and load emitter/source as a measure for dic/dt (derivative collector current over time) and did/dt, respectively (derivative drain current over time). Switching on is generally performed via a voltage source VOn and the base resistor (impedance) k1. Thereby, the gate current IGon is induced. Depending on the implementation, in the switching edge, reduction of the gate current follows during the di/dt phase and a rise/reduction during the du/dt phase. Switching off is generally performed by a voltage source VOff and the base impedance k2. Thereby, the gate current IGoff is induced. Depending on the embodiment, in the switching edge, reduction of the gate current follows during the di/dt phase and a rise/reduction during the du/dt phase. In the error case “overcurrent”, an alternative switch-off path via the impedance k3 is used.
This enables better adaptation of the driving power for each switching point/operating point and good optimization between short death/delay time, di/dt behavior, du/dt behavior and power losses in the tail phase. Interference radiation conforming to standards influences switching losses to a lesser extent. Further, low conduction losses in the power conductor can be ensured. The concept offers a basic degree of protection and good adaptation to components (i.e., power switches) and edge parameter changes by feedback signals.
The disadvantages of this concept are that a significantly increased need for components results, mostly expensive analog components having a high bandwidth are necessitated, increased losses occur in the GDU by components having a high bandwidth, that feedback circuits cause additional losses due to intervention, that increased costs occur, that switching losses can only be optimized for one operating point (voltage, load current, temperature), that the switching sequence does not compensate any component leakages, that high effort results when using new/different power switches, that no flexible adaptation or scalability of the concept is possible, that merely a configurable but no high degree of protection can be obtained, that a high voltage potential (collector) necessitates installation space on a driver area, since air and creeping distances have to be considered, that high voltage components have great leakages, that no adaptation of the control plane is possible by interventions of the feedbacks, that the usage of the measured parasitic leakage inductance of the power switch is no precisely specified characteristic of the power switch itself, that with small leakage inductances no direct processing of the signal is possible and that the direct intervention with feedback comprises a phase shift such that the intervention, depending on the impedances in the gate line, only has a limited or no effect in fast switching processes and can result in undesirable oscillations.
FIG. 14 shows an embodiment of a single-stage/multi-stage digitally controlled GDU. The same serves to synchronize parallel power switches. With the help of a di/dt sensor, the beginning of the current rise (current change) during switching on as well as the beginning of the current drop during switching off is detected. Differences between switching on start and switching off start are stored and processed with further data in a DSP instance (DSP=digital signal processor). Thereby, delays for the respective switch-on time and switch-off time are determined for the next switching time and transmitted to the FPGA (FPGA=Field Programmable Gate Array).
This concept offers, among others, the advantages that low conduction losses in the power switch are ensured, that a basic degree of protection can be obtained, that a good adaption to the component and edge parameter changes by feedback signals are enabled, that good symmetry of the switching edges is enabled, that no additional losses occur by direct intervention of the feedback circuits in the gate current, that good adaptation of the switching time to component leakages of the power switches is enabled and that module-independent detection of the current change velocity di/dt is possible.
The disadvantages of this concept are a significantly increased need for components due to two programmable instances, that mostly expensive analog components having a high bandwidth are necessitated, that increased losses occur in the GDU due to two programmable instances, that increased costs can result when using high-performance DSP and/or FPGA, that no optimization of the actual switching edge curve is necessitated/possible, that switching losses can only be optimized for one operating point (voltage, load current, temperature), that the switching sequence does not compensate any component leakages, that a high effort results when using new/different power switches, that no flexible adaptation/scalability is possible and that merely a configurable but no high degree of protection can be obtained.
FIG. 15 shows a further embodiment of a digital control. In this embodiment stage, up to n=7 purely resistive switch-on paths as well as up to n=7 purely resistive switch-off paths are implemented. Via a configuration, a desired operational sequence is programmed into the FPGA. Additionally, further operating parameters, such as intermediate circuit voltage, maximum collector current, switching frequency, IGBT type and power partial topology are stored. They all serve to configure the protective functions. The protective functions include two-stage di/dt detection and four-stage voltage collector emitter VCE detection. Switching on is performed by means of a time controlled state machine activating the configured resistive switching-on paths one after the other. The VCE and di/dt states are merely processed for short circuit and desaturation monitoring.
Switching off is also performed in a time-controlled manner via timing via the configured resistive switch-off paths.
Advantages of the concept are ensuring low conduction losses in the power switch 12, a high configurable degree of protection, a low hardware change effort for driver adaptations when using new/different power switches in terms of plug and play, a flexible scalable GDU for different applications as well as optimization of the actual switching edge curve for (but only one) operating point (voltage, load current, temperature).
However, it is a disadvantage of this concept that a significantly increased need for components results by a total of 14 switching paths, wherein also significantly increased costs result by 14 switching paths. The concept has poor efficiency as never all paths are used at any time. Further, great space requirements result due to a plurality of control paths and feedback paths. The usage of the parasitic leakage inductance of the power switch is no specifically specified characteristic of the power switch resulting in measurement inaccuracies. The concept necessitates signal processing of the leakage inductance due to the low signal amplitudes. The usage of high-performance DSP and FPGA results in increased costs when implementing the concept. Thus, the switching losses can merely be optimized for one operating point (voltage, load current, temperature). Further, the switching sequence does not compensate any component leakage.
There are further digital approaches, which essentially allow a configuration of different resistive switch-on and switch-off paths, also during runtime.
A further approach includes a completely closed control loop with digital control core. Detecting the data is performed with fast analog components and subsequent digitalization. The digitized data are processed in the computer core, and again analogized by means of a digital-to-analog converter (DAC) in order to be passed on to the output stages as control information. Here, the main problem is the delay due to the signal processing times. Thus, directly intervening into the dynamic switching behavior is only possible with very slow edge curves.
In summary, the main problem of all controlled methods, independent of whether the same are analog or digital is the lack of adaptation to the operating point of the power unit. Optimization can only take place for one or a few operating points. Some component leakages and parameter variances of the power switches cannot be compensated.
All analog-controlled methods have the problem, as long as they have direct influence on the current switching edge, that they necessitate very expensive energy-hungry components having a high bandwidth resulting in a low energy efficiency. The intervention is performed by inverse feedback into the gate output stage. Thus, additional control losses are generated.
In the di/dt control by means of leakage inductance between auxiliary emitter/source and load emitter/source, great deviations exist of this parameter of the power module that is not specified in detail and/or not guaranteed. Additionally, a ground loop is interspersed. Since the leakage inductance is generally very small and continuously optimized, no direct processing can be performed.
Returning and processing the auxiliary collector/drain potential for protective functions and/or a du/dt control necessitates usage of components having high electric strength, frequently even in a cascaded manner. The same are mostly expensive and frequently too inaccurate for signal processing since the same are not operated in the optimum operating point. Apart from that, looping-in this potential results in a large unused installation area due to the necessitated voltage clearances.
Further, the approach of analog control loops is only developed and qualified for one topology/application for exactly one power switch. Adapting the topology to other or second source switches (second source is, for example, a switch of another producer identical in design) with slightly amended characteristics necessitates a hardware variation of the topology and hence a new design of the topology.
The problem of known digitally controlled solutions is also the lack of independent adaptation to the current operating point or the component leakage. Merely several resistive paths can be selected and used. Unused paths represent unused areas and still cause component costs since the same are populated.